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Atrasti 92 termini

▪ absolute instruction (deprecated in this sense)
▪ additional payment for instruction
▪ administrative instruction
▪ air traffic control instruction
▪ arithmetic instruction
▪ Beginners All-purpose Symbolic Instruction Code
▪ Beginner's All purpose Symbolic Instruction Code
▪ byte instruction
▪ branch instruction
▪ built-in instruction
▪ closing instruction
▪ compiling of instruction
▪ Complex Instruction Set Computer
▪ complex instruction set computing
▪ computer instruction
▪ computer instruction code
▪ conditional jump instruction
▪ course of instruction
▪ current instruction
▪ departmental instruction
▪ direct debit instruction
▪ direct instruction
▪ display instruction (deprecated in this sense)
▪ driving instruction
▪ ecological information and instruction centre
▪ ecological instruction
▪ European Agreement on the Instruction and Education of Nurses
▪ European Instruction
▪ external instruction
▪ generation of instruction
▪ illegal instruction
▪ immediate instruction
▪ indirect instruction
▪ initial instruction*
▪ instruction
▪ instruction address
▪ instruction code
▪ instruction format
▪ instruction in museum
▪ instruction in the event of failure to cover
▪ instruction length
▪ instruction list
▪ instruction prefetch
▪ instruction register
▪ instruction repertoire
▪ instruction[s]
▪ instruction set
▪ instruction set architecture
▪ instruction to discriminate
▪ instruction trail
▪ instruction word
▪ introductory instruction
▪ job instruction
▪ jump instruction
▪ language of instruction
▪ learning from instruction
▪ logical instruction
▪ machine instruction
▪ mandatory instruction
▪ Multiple Instruction stream
▪ N-address instruction
▪ no-operation instruction
▪ null instruction
▪ one-address instruction
▪ one-plus-one address instruction
▪ packing instruction
▪ privileged instruction
▪ production instruction
▪ Programme Security Instruction
▪ Project Security Instruction
▪ Reduced Instruction Set Computer
▪ reduced instruction set computing
▪ relative instruction (deprecated in this sense)
▪ repeated instruction*
▪ repetition instruction
▪ self-instruction
▪ service instruction
▪ shipping instruction
▪ single-address instruction
▪ Single Instruction stream
▪ standing instruction
▪ three-address instruction
▪ to act in compliance with instruction
▪ to contravene instruction
▪ to depart from instruction
▪ to follow instruction
▪ to obey instruction
▪ to observe instruction
▪ to violate instruction
▪ two-address instruction
▪ unconditional jump instruction
▪ zero-address instruction
  1. EN RISC; reduced instruction set computing
    LV sašaurinātās instrukcijkopas skaitļošana
    RU архитектура RISC
    DE RISC
    Definīcija: A microprocessor design that focuses on rapid and efficient processing of a relatively small set of simple instructions. RISC architecture limits the number of instructions that are build into the microprocessor, but optimizes each so it can be carried out very rapidly-usually within a single clock cycle.
    Microsoft Terminology 2023. Entry from the Microsoft Language Portal.
    © 2023 Microsoft Corporation. All rights reserved.
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